CODA988
用于高端产品的多格式硬件编解码器IP

Chips&Media的新CODA9系列 - 硬件全高清编码器和解码器核心CODA966和CODA988旨在满足增强数字视频质量,更高分辨率和下一代多媒体应用的帧速率的强大需求。

  该核心能够每秒高达1080p 60帧的解码或编码,实现视频代码转换或通信,甚至可以达到4K(4Kx2K)分辨率,超过1080p的四倍。

CODA9系列为立体3D体验的MVC和针对互联网和HTML5支持设备的Theora和WebM(VP8)增加了全面解码支持。

   Decoder

  • ISO/IEC 14496-10 AVC(H.264) BP/MP/HP@L4.2
  • ISO/IEC 14496-10/5 MVC Stereo High Profile@L4.1
  • ISO/IEC 14496-2 MPEG-4 SP,ASP@L6
  • SMPTE 421M-2006 VC-1 SP,MP,AP@L3
  • ISO/IEC 13818-2 MPEG-2 MP@HL
  • ITU-T H.263(Annex I,J,K,T)
  • RealVideo v.8/9/10
  • AVS Jizhun @L6.2
  • AVS+ Guangdian @L6.2
  • On2 VP8
  • Sorenson Spark
  • Theora

     Encoder

  • ISO/IEC 14496-10 AVC(H.264) HP@L4.2
  • ISO/IEC 14496-2 MPEG-4 SP@L6
  • ITU-T H.263(Annex J,K,T)

 Encoding tools

  • Selective [+/-64, +/-48] Quarter-pel and half-pel accuracy motion estimation using a full-search algorithm
  • MPEG-4 AC/DC prediction
  • H.264/AVC intra-prediction
  • CABAC/CAVLC for H.264/AVC
  • In-loop deblocking filter for both H.264 and H.263
  • H.263 Annex J, K(RS=0, ASO=0) and T
  • Error resilience tools

         · Required host processor resource to run : under 1MIPS

  • Flexible Bit-rate control

         · CBR

         · VBR

         · Fixed QP

         · Low delay coding

  • Intra refresh

         · Cyclic intra refresh(CIR)

         · Motion adaptive intra refresh

  • Linear or tiled frame buffer
  • Sub frame sync. for real-time applications
  • Built-in pre rotation/mirroring function

         · 90xn degree rotation(n=0,1,2,3)

         · Vertical/horizontal mirroring

     Decoding tools

  • All variable block size supported
  • Unrestricted motion vector
  • CABAC/CAVLC for H.264/AVC
  • MPEG-4 AC/DC prediction
  • H.264/AVC intra-predictio
  • H.263 Annex I, J, K(RS=0, ASO=0) and T
  • MPEG-2 partial acceleration
  • In-loop deblocking filter for H.264, H.263, RV and AVS
  • Overlapped smoothing filter for VC-1
  • Error resilience tools

         · Resync. marker & data-partitioning with RVLC for MPEG-4

  • Linear or tiled frame buffer
  • Built-in post processing unit

         · 90xn degree rotation(n=0,1,2,3)

         · Vertical/horizontal mirroring

         · De-ringing

         · De-blocking filter for MPEG-2/MPEG-4 and DivX

  • AMBA 32-bit APB interface for communication with a host processor
  • AMBA 64-bit AXI interface for the external memory

 In half-duplex mode

  • Full HD(1080p) 30fps decoding @<133MHz>
  • Full HD(1080p) 60fps decoding @<266MHz>

     In full-duplex mode

  • HD(720p) 30fps simultaneous encoding and decoding @133MHz
  • Full HD(1080p) 30fps simultaneous encoding and decoding @266MHz

         · Required host processor resource to run : under 1MIPS

  • SmartTV
  • High-end Set-top boxes
  • Video conferenciing
  • Real-time Video Transcoding devices
  • Premium Smartphone, Tablets
  • Digital Camcorders
  • IP Cameras/Surveillance DVR
  • Membership requires registration and an administrator approval to download Briefspec.
CODA_980.pdf
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CODA_series_2.pdf
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